Navigating the AI and ML Landscape for Future Readiness
In this course, we examine practical needs for deployment of AI and ML for use in chip design or EDA development. These include understanding of chip design and EDA data in practice and implications for data used to develop ML capabilities. We will also examine challenges – as well as potential solutions – to obtaining value from use of AI and ML in the chip design or EDA context. These challenges include the quality and volume of data, the high bar for accuracy or optimization quality, and the cost of training for ML models. Strategies are needed for data collection, management and retention; hardware infrastructure; and “MLOps” processes are discussed as well. After summarizing the landscape of today’s technological advancement, we close with a 3-5 year projection of how AI and ML, including Generative AI methods, will continue to rapidly change modern chip design and EDA.
Brought to you by IEEE Educational Activities in partnership with IEEE Future Directions.
What you will learn:
Part 4: Analysis and Signoff
We will introduce an important application area for AI/ML methods. The core concept is that AI/ML – especially statistical and physics-constrained methods – can tremendously accelerate the analysis and simulation of “the laws of physics” for phenomena that span timing, power, temperature, reliability, and more. At the end of this part, you will be able to:
- Describe the distinction between “analysis” and “signoff” in the design process
- Describe the accuracy-cost tradeoff that governs analysis and signoff tools
- Describe how extrapolation and physics-based AI/ML models can bring new efficiencies to chip design and EDA
Part 5: Learning and Optimization
In this part, we start with synergies between modern machine learning and modern optimization methods. We then delve into three approaches at the nexus of ML and optimization: “derivative-free” or “black-box” Bayesian optimization methods; the use of large language models in optimization; and reinforcement learning-based optimization. At the end of this part, you will be able to:
- Describe the basic concepts underlying each of these three approaches
- Describe properties of applications that make one or more of these three approaches well-suited to try
- Describe “Interactive Learning” and “Learn to Optimize” frameworks that aim to bridge learning and optimization
Part 6: Deployment
AI/ML for chip design and EDA must be deployed in order to have business impacts. At the end of this part, you will be able to:
- Describe major challenges to practical deployment of AI/ML, including expectations, infrastructure and resourcing, and “MLOps”
- Describe issues related to the data used for AI/ML
This course is part of the following Course Program:
AI and ML in Chip Design
Courses included in this program:
Instructor
Andrew B. Kahng
Andrew B. Kahng is Distinguished Professor of CSE and ECE and holder of the endowed chair in high-performance computing at the University of California at San Diego. He received the A.B. degree in applied mathematics (physics) from Harvard College, and the M.S. and Ph.D. degrees in computer science from UC San Diego. From 1989 to 2000, he was on the UCLA computer science faculty before moving to UC San Diego in 2001. He was visiting scientist at Cadence Design Systems (1995-97) and founder/CTO at Blaze DFM (2004-06). He is coauthor of 3 books and over 500 journal and conference papers, holds 35 issued U.S. patents, and is a Fellow of IEEE and of ACM. He was the 2019 Ho-Am Prize laureate in Engineering. From 2000-2016 he served as international chair/co-chair of the International Technology Roadmap for Semiconductors (ITRS) Design and System Drivers working groups. He has served as general chair of IEEE-sponsored conferences such as the Design Automation Conference, the International Symposium on Physical Design, and the Workshop on Machine Learning. He has also served on the editorial boards of IEEE Transactions on VLSI, IEEE Transactions on Circuits and Systems I, and IEEE Design and Test (where he contributes the regular column, “The Road Ahead”).
Publication Year: 2024
ISBN: 978-1-7281-7871-4