Dual Port SRAM: Row Decoder
Since there are 2 ports in this design, there must be 2 Row Decoders--one for each port. A big portion of the challenge is to be able to lay out the both Row Decoders and have each one be able to interface with every row of bit cells. I addition to that, the inputs to from the address buffers associated with each port must be considered in how they are placed in the layout.
What you will learn:
- Explain how row decoder works
- Describe row address buffer
Related courses:
Who should attend: Electrical engineer, Design engineer, Product engineer, Lead engineer, Project engineer, Manufacturing engineer
Instructor
Doug Sheppard
Doug Sheppard has 33 years experience designing and developing integrated circuits. He is currently President, Owner and founder of Valence, Inc (www.valence-inc.com) that was started in 1993. Valence specializes in digital integrated circuit design with a main focus on memories. Some of the key products are embedded libraries, custom memories & memory compiler products.
Publication Year: 2014
ISBN: 1-4673-3226-7