SRAM Design: Overview and Memory Cell Design

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This tutorial walks you through the initial steps in designing an SRAM  and then focuses on the first circuit that we must design - the memory  cell. An overview of the architecture will be presented in a block  diagram that will describe the functions of the major blocks required to  create an SRAM. A large portion of this video will be dedicated to the  design and layout of the memory cell (also called the bit cell) and how  it is arrayed. It starts with a description of how the memory cell works  then analyzes how the cell is read and written, with specific attention  paid to read disturb which can cause the cell to inadvertently flip  when it is read. Waveforms from SPICE simulations of the memory cell  will be presented along with a SPICE input file that can be used to  create your own simulations. A SPICE netlist from the layout of the  memory cell will also be supplied so that the actual parasitic  capacitance can be included in the simulations. Suggested order for  proceeding through the IEEE eLearning Series on Design of Integrated  Circuits tutorials: 1. Integrated Circuit Digital Design Methodology; 2.  Integrated Circuit Digital Design Methodology - Advanced Analysis and  Simulation; 3. SRAM Design - Overview and Memory Cell Division; 4. SRAM  Design - Array Design and Precharge; 5. SRAM Design - Sensing Scheme; 6.  SRAM Design - MUX Factor and Data Buffer; 7. SRAM Design - Write Path;  8. SRAM Design - ROW Decoder; 9. SRAM Design - Address Buffer; 10. SRAM  Design - Clock Buffer; 11. SRAM Design - Control Circuitry; 12. SRAM  Design - Sensing and Write Control.

What you will learn:

  • Provide a walk through of the initial steps in designing an SRAM
  • Examine the first circuit that we must design – the memory cell
  • Present an overview of the architecture in a block diagram that will describe the functions of the major blocks required to create an SRAM

Related courses:

Who should attend: Electrical engineer, Design engineer, Product engineer, Lead engineer, Project engineer, Manufacturing engineer

Instructor 

Doug Sheppard

Doug Sheppard Photo

Doug Sheppard has 33 years experience designing and developing  integrated circuits. He is currently President, Owner and founder of  Valence, Inc (www.valence-inc.com) that was started in 1993. Valence  specializes in digital integrated circuit design with a main focus on  memories. Some of the key products are embedded libraries, custom  memories & memory compiler products

Publication Year: 2009

ISBN: 978-1-4244-3004-8


SRAM Design: Overview and Memory Cell Design
  • Course Provider: Educational Activities
  • Course Number: EDP111
  • Duration (Hours): 1
  • Credits: 0.1 CEU/ 1 PDH